OBSD reports
> “The 4GB and 8GB variants of Raspberry Pi 5 are built around two key chips: the RP1 I/O controller, developed here at Raspberry Pi and providing the interfacing capabilities of the platform; and BCM2712C1, a 16nm application processor built by our friends at Broadcom. BCM2712C1 is a hugely complex and powerful device, with a quad-core Arm Cortex-A76 application processor running at 2.4GHz, and the latest iteration of the VideoCore multimedia platform. Alongside the features required to power a Raspberry Pi, it also contains functionality intended to serve other markets, which we don’t need. This ‘dark silicon’ is permanently disabled in the chips we use, but takes up die space, and therefore adds cost. The new D0 stepping strips away all that unneeded functionality, leaving only the bits we need.”
This is what Eben Upton reported on 19th Aug 2024. [0] and Geoff Geerling makes a comment on chip revisions. [1]
> “Steppings are basically chip revisions where they don't change functionality, and usually just fix bugs, or tweak the layout. But even tiny design changes could have unintended consequences.”
So the dark silicon removal step from BCC1 to BCD0, a cost cutting measure, killed wifi? Damn, I was hoping to use this for a obsd firewall.
Cf:
[0] <https://www.raspberrypi.com/news/2gb-raspberry-pi-5-on-sale-...>
[1] < https://www.jeffgeerling.com/blog/2024/new-2gb-pi-5-has-33-s...>
The d0 stepping boards I have with wifi work with the linux kernel, still.
“WiFi is still via SDIO on the Broadcom chip, IIRC.”
<https://www.jeffgeerling.com/comment/34061#comment-34061>
And
“Ran a quick search on Raspberry Pi's github linux repo and found where I got my info from re the stuff they took out on D0. From what I can see, they actually removed device tree support for parts of the chip they don't use on C0/C1 that are not present on D0, and folded these changes into the same DTS file. They also seem to have added a DTS specifically for the D0 stepping, which seems to be register changes, i.e. stuff that is present in both variants of the chip but has moved or needs to otherwise be handled differently between C1 and D0. See https://github.com/raspberrypi/linux/pull/5847, specifically for the bits removed see <https://github.com/raspberrypi/linux/pull/5847/commits/8be08...>“
<https://www.jeffgeerling.com/comment/34061#comment-34061>
Something broke. Without going through the obsd code it remains unknown. Unless there is reference to uart3 & uart4?