> TSMC's A14 is brand-new process technology that is based on the company's 2nd Generation GAAFET nanosheet transistors and new standard cell architecture to enable performance, power, and scaling advantages. TSMC expects its A14 to deliver a 10% to 15% performance improvement at the same power and complexity, a 25% to 30% lower power consumption at the same frequency as well as transistor count, and 20% - 23% higher transistor density (for mixed chip design and logic, respectively), compared to N2. Since A14 is an all-new node, it will require new IPs, optimizations, and EDA software than N2P (which leverages N2 IP) as well as A16, which is N2P with backside power delivery.
Sure, being an essential part of the global supply chain for tech is important. It's also important to show support for Taiwan, to convince Japan, South Korea, etc from arming with nukes. That could set off a chain reaction in which everyone who is close says "f*ck it, I guess if everyone else is doing it..." The veneer of the US security umbrella folds and everyone suddenly feels they need to build (or retain) the bomb to protect themselves (like Ukraine failed to do in giving up theirs.) Now everyone needs MORE nukes because you have a LOT more targets.
NATO doesn't consider Ukraine as significant because they have vital tech they supply globally. Rather, NATO is concerned about an aggressive regional power that may have aims on more than just Ukraine.
If china succeeds in leapfrogging ASML. With their particle accelerator light source it likely won’t matter. They will have a home engineered piece of the solution.
They have a cost advantage. Kinda fine for where I'm standing; if we want to have more investment, we must liberalize migration! If we don't liberalize migration, necessarily the capital-labor ratio will be more capital-scarce in other countries.
I don't think it's easy to migrate to Taiwan (it's very unlikely that it's easier than migrating here, most East Asian countries make that difficult) so that doesn't seem to actually be a prerequisite.
We already have a pretty serious unemployment problem among college graduates so something else seems to be going on (a problem with domestic universities?)
I blame the American corporate meme. American corporations are hideously slow, lumbering and quite honestly many are just "too big to fail" prop ups at this point. Long gone are actual qualified individuals running even semiconductor manufacturers and its just bean counters and country club nephews.
American corporations are what created "Silicon Valley" in the first place. America is not slow, and it's definitely not "too big to fail" as the current administration is trying to make it fail, but that is an aside.
I think America doesn't manufacture semiconductors because it is a very unclean process, full of nasty chemicals. It's expensive to make semiconductors and deal with the clean-up. There are less environmental restrictions and cheaper labor in other parts of the world.
There are a bunch of Superfund sites around Mountain View, CA that serve as a reminder about the US Semiconductor industry - Fairchild Semiconductor, Intel, National Semiconductor, Monolithic Memories, and Raytheon to name a few.
Nobody in the U.S. really wants that in their back yard. Of course we've seen the same kind of thing from fracking, and everything else that rightly should be regulated or banned.
What happens now with a defunded and purposefully dysfunctional EPA is anyone's guess. Maybe manufacturers will exploit the political climate to further destroy the environment to make a few more million or billion dollars.
This is effective feature size and has little to do with actual geometry. Transistor size has barely budged in the last 10–15 years. The limitation is electrical, and it's not clear where that limit is. The smallest gate was built with an AFM out ~7 atoms; that's about 8 orders of magnitude smaller than a transistor, rn, and upwards of 9 than a stdcell. There's a LOT of room; we just don't know a good path to get to there.
"The smallest gate was built with an AFM out ~7 atoms; that's about 8 orders of magnitude smaller than a transistor"
I was thrown off by your statement, so here are some numbers: a modern chip like Nvidia's GH100 manufactured at a 5 nm process is 80 billion gates in 814 mm². That means a gate is 100 nm wide which is the width of 500 silicon atoms. On a 2D area that's 250k atoms. I don't know the thickness but assuming it's also 500 atoms then a gate has a volume of 125 million atoms.
So I guess you get your "8 orders of magnitude" difference if you compare the three-dimensional volume (7 atoms vs 125 million). But on one dimension it's only 2 orders of magnitude (7 atoms vs 500). And the semiconductor industry measures progress on one dimension so to me the "2 orders of magnitude" seems the more relevant comparison to make.
So, it's more of an engineering problem than a physical one? I read somewhere a while ago about strange quantum effects activating at these scales too. What's the current state beyond 1.4 nm with our current knowledge?
TSMC announced new fabs in the US earlier this year. They need new fabs in Taiwan so nobody gets any ideas that TSMC could continue operations without a free Taiwan. Keeping Taiwan indispensable to the US is how they keep Chinese invasion plans in the planning state
Why would a free taiwan be necessary? I don’t think there ccp would have any qualms about tsmc continuing operation. A chinese company being the indisputed best at the modt advanced industry in the world is a good thing for them. Assuming a bloodless takeover occurred it would be business as usual.
At the TSMC second-quarter earnings conference and conference call on Thursday, TSMC chairman C.C. Wei (魏哲家) said that after the completion of the company’s US$165 billion investment in the US, “about 30 percent of our 2-nanometer and more advanced capacity will be located in Arizona, creating an independent leading-edge semiconductor manufacturing cluster in the US.”
The Arizona investment includes six advanced wafer manufacturing fabs, two advanced packaging fabs and a major research and development center.
As TSMC and Taiwang government policy, they always build it first in Taiwan, run for some years and then build in the US. They keep Taiwan relevant and protected this way.
Thanks to all the investment due to AI we have been able to continue these improvement at the current rate. To put things into perspective an Apple 1.4nm A18 Pro ( 3nm ) would only use ~50% of the energy with the same performance.
I am hoping we have more to squeeze out from an IPC or PPA ( Performance per area ) metric. ARM seems to be in the lead in this area. Wondering if Apple will have something to show in A19 / M5.
NAND and DRAM side is a bit more worrying though. Nothing in the pipeline suggest some dramatic changes.
Edit: Not sure why I am getting downvoted every time I say it is AI investment leading to improvements. I guess some on HN really hate AI.
What advantage will a 1.4nm chip have over a 4nm one? What new capabilities will this tech unlock on an edge device like my iPhone ?
Please don't mention lower power consumption.
Silicon is way outside my wheelhouse, so genuine question: why not mention power consumption? In the data center, is this not one of the most important metrics?
I've not checked it, but AFAIK power consumption isn't really improved much if at all with dye shrinks. The main benefits are entirely around transistor density increases which allows for things like bigger caches.
It'll be beneficial to DRAM chips, allowing for higher density memory. And it'll be beneficial to GPGPUs, allowing for more GPU processors in a package.
> The main benefits are entirely around transistor density increases which allows for things like bigger caches
SRAM is probably the the worst example as it scales poorly with process shrinks. There are tricks still left in the bag to deal with this, like GAA, but caches and SRAM cells are not the headline here. It's power and general transistor density.
If the marketing naming is to be believed, in 1.4nm vs 4nm you'd be able to fit ~twice the transistors in your chip. That's twice the cores, twice the cache... That usually makes it faster.
A 1.4nm chip offers significant performance and capability improvements over a 4nm chip, primarily due to increased transistor density. This allows for more powerful and efficient on-device AI processing, enabling new features and capabilities on devices like an iPhone without relying on cloud-based services
Readit News
> TSMC's A14 is brand-new process technology that is based on the company's 2nd Generation GAAFET nanosheet transistors and new standard cell architecture to enable performance, power, and scaling advantages. TSMC expects its A14 to deliver a 10% to 15% performance improvement at the same power and complexity, a 25% to 30% lower power consumption at the same frequency as well as transistor count, and 20% - 23% higher transistor density (for mixed chip design and logic, respectively), compared to N2. Since A14 is an all-new node, it will require new IPs, optimizations, and EDA software than N2P (which leverages N2 IP) as well as A16, which is N2P with backside power delivery.
https://www.tomshardware.com/tech-industry/tsmc-unveils-1-4n...
At this point, the transistors will scale smaller and the eventually the whole chip will just be sram by area.
If you were Taiwanese this would worry you?
It makes complete sense for Taiwan to invest in maintaining it’s “silicon shield” even as china tries to catch up with fabrication on the mainland.
NATO doesn't consider Ukraine as significant because they have vital tech they supply globally. Rather, NATO is concerned about an aggressive regional power that may have aims on more than just Ukraine.
China can comfortably make chips that might be the equivalent of 5 year old Taiwanese ones. Last time I checked, that’s extremely viable.
No military general ever is going to say, “we can’t invade, we’re half a decade behind!”
We already have a pretty serious unemployment problem among college graduates so something else seems to be going on (a problem with domestic universities?)
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I think America doesn't manufacture semiconductors because it is a very unclean process, full of nasty chemicals. It's expensive to make semiconductors and deal with the clean-up. There are less environmental restrictions and cheaper labor in other parts of the world.
There are a bunch of Superfund sites around Mountain View, CA that serve as a reminder about the US Semiconductor industry - Fairchild Semiconductor, Intel, National Semiconductor, Monolithic Memories, and Raytheon to name a few.
Nobody in the U.S. really wants that in their back yard. Of course we've seen the same kind of thing from fracking, and everything else that rightly should be regulated or banned.
What happens now with a defunded and purposefully dysfunctional EPA is anyone's guess. Maybe manufacturers will exploit the political climate to further destroy the environment to make a few more million or billion dollars.
I was thrown off by your statement, so here are some numbers: a modern chip like Nvidia's GH100 manufactured at a 5 nm process is 80 billion gates in 814 mm². That means a gate is 100 nm wide which is the width of 500 silicon atoms. On a 2D area that's 250k atoms. I don't know the thickness but assuming it's also 500 atoms then a gate has a volume of 125 million atoms.
So I guess you get your "8 orders of magnitude" difference if you compare the three-dimensional volume (7 atoms vs 125 million). But on one dimension it's only 2 orders of magnitude (7 atoms vs 500). And the semiconductor industry measures progress on one dimension so to me the "2 orders of magnitude" seems the more relevant comparison to make.
But also:
At the TSMC second-quarter earnings conference and conference call on Thursday, TSMC chairman C.C. Wei (魏哲家) said that after the completion of the company’s US$165 billion investment in the US, “about 30 percent of our 2-nanometer and more advanced capacity will be located in Arizona, creating an independent leading-edge semiconductor manufacturing cluster in the US.”
The Arizona investment includes six advanced wafer manufacturing fabs, two advanced packaging fabs and a major research and development center.
From the article:
.. so it's interesting that they are moving forward with domestic 1.4nm given the geopolitical climate.They might build factories outside Taiwan you never know.
I wish they’d take the next step with the defense treaty to move even more capacity (esp for the highest grade stuff) to stateside.
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I am hoping we have more to squeeze out from an IPC or PPA ( Performance per area ) metric. ARM seems to be in the lead in this area. Wondering if Apple will have something to show in A19 / M5.
NAND and DRAM side is a bit more worrying though. Nothing in the pipeline suggest some dramatic changes.
Edit: Not sure why I am getting downvoted every time I say it is AI investment leading to improvements. I guess some on HN really hate AI.
Silicon is way outside my wheelhouse, so genuine question: why not mention power consumption? In the data center, is this not one of the most important metrics?
How about "longer battery life".
Also "lower cost".
Or sacrificing those on the alter of more compute running more complex things.
It'll be beneficial to DRAM chips, allowing for higher density memory. And it'll be beneficial to GPGPUs, allowing for more GPU processors in a package.
SRAM is probably the the worst example as it scales poorly with process shrinks. There are tricks still left in the bag to deal with this, like GAA, but caches and SRAM cells are not the headline here. It's power and general transistor density.
For data centers, it will help a lot. More compute for same power.