The legendary Jim Keller is going all in on RISC-V, if you don't know Google him. His company has many core designs coming as well chiplets: https://tenstorrent.com/risc-v/
Because of Jim Keller and similar efforts I wouldn't be surprised for RISC-V to see both core count as well as per core performance meet ARM over the next few years. Maybe even exceed if Jim can push the chiplet approach faster than ARM can roll theirs out.
Hopefully this drives a lot of innovation and we all benefit as a result.
I think that using ARM is going to be viewed as being locked into ARM's ever increasing licensing fees, where as if you go RISC-V, you are free to switch CPU providers.
That's not even true within the ARM ecosystem itself. The chips from Infineon are not source-code compatible with STM, STM is not compatible with Microchip, Microchip is not compatible with TI...
The problem is that the ARM core is just a portion of the architecture. Everything on top of that - GPIO, memory interfaces, timing, etc - is vendor specific, and will stay that way for RISC-V. RISC-V is just an instruction set architecture (with some appendages), not a blueprint for a complete CPU / MCU / SoC.
Not to mention, the chips also won't be electrically-compatible. Your hardware architecture can be as daunting to redesign as the code, if not more so. There's a reason why we try to do as much as possible in software, after all...
https://joindeleteme.com/
https://www.optery.com/
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