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avodonosov commented on We should have the ability to run any code we want on hardware we own   hugotunius.se/2025/08/31/... · Posted by u/K0nserv
avodonosov · 4 days ago
Ha-ha.

Android doesn't even let you access your files. It has famously blocked acess to the subfolders of /Android/data - every app has a subfolder there where it sfores files. And you can not visit these subfolders since Android 11.

A buggy app accumulates gigabytes (literaly, i am not exagregating) of temp files there, but i cant visit the folder to delete them.

Google explains that "it's for you safety".

I have to call it with the strong word "idiotic".

There are apps now where storing files in a shared, accessible folder is a payed option.

And in this world you want to own your hardware.

avodonosov commented on Without the futex, it's futile   h4x0r.org/futex/... · Posted by u/eatonphil
junon · 17 days ago
If you mean memory barriers in terms of concurrency, it's just a primitive for concurrency that counts downward atomically once per participant (e.g. a group of threads) and then each atomically waits until the counter reaches zero before continuing. It's used to synchronize (i.e. put into lockstep) two concurrent processes such that they must all wait at a given point before continuing more or less all at once, often as part of a larger process.

If you mean a barrier in terms of a memory "fence", that's an event on CPUs whereby any pending memory instructions that have been pipelined and thus not committed are forced to commit and complete before continuing. Usually only relevant for a single core, but they're used to make sure that other cores will see the same memory values and your pending writes would reflect (or, conversely, sometimes making sure your own core sees the reads from other cores as fresh as possible before the actual read op).

avodonosov · 6 days ago
Thank you for the comment. I mean fences.

Haven't ever heard of barriers as a counter-like primitive (sounds like a semaphore or CountDownLatch)

avodonosov commented on Without the futex, it's futile   h4x0r.org/futex/... · Posted by u/eatonphil
inetknght · 17 days ago
tl;dr:

In a multi-threaded context, memory reads and writes can be reordered by hardware. It gets more complicated with shared cache. Imagine that you have core 1 writing to some address at (nearly) the same time that core 2 reads from that. Does core 2 read the old or the new? Especially if they don't share the same cache -- core 1 might "write" to a given address, but it only gets written to core 1's cache and then "scheduled" to be written out to main memory. Meanwhile, later core 2 tries to read that address, it's not in its cache, so it pulls from main memory before core 1's cache has flushed. As far as core 2 is concerned, the write happened after it read from the address even though physically the write finished in core 1 before core 2's read instruction might have even started.

A memory barrier tells the hardware to ensure that reads-before is also "happens-before" (or after) a given writen to the same address. It's often (but not always) a cache and memory synchronization across cores.

I found Fedora Pikus's cppcon 2017 presentation [1] to be informative, and Michael Wong's 2015 presentation [0] filled in some of the gaps.

C++, being a generic language for many hardware implementations, provides a lot more detailed concepts for memory ordering [2], which is important for hardwares that have more granularity in barrier types that what most people are used to with x86-derived memory models.

[0]: https://www.youtube.com/watch?v=DS2m7T6NKZQ

[1]: https://www.youtube.com/watch?v=ZQFzMfHIxng

[2]: https://en.cppreference.com/w/cpp/atomic/memory_order.html

avodonosov · 8 days ago
Than you.
avodonosov commented on Altered states of consciousness induced by breathwork accompanied by music   journals.plos.org/plosone... · Posted by u/gnabgib
avodonosov · 8 days ago
> ‘Oceanic Boundlessness’ (OBN)

LOL

avodonosov commented on Without the futex, it's futile   h4x0r.org/futex/... · Posted by u/eatonphil
ethan_smith · 16 days ago
Paul McKenney's "Memory Barriers: a Hardware View for Software Hackers" is excellent, with Preshing's blog (preshing.com) offering more approachable explanations for beginners.
avodonosov · 9 days ago
Thank you
avodonosov commented on Without the futex, it's futile   h4x0r.org/futex/... · Posted by u/eatonphil
senderista · 17 days ago
"Memory Barriers: a Hardware View for Software Hackers"

https://www.researchgate.net/publication/228824849_Memory_Ba...

avodonosov · 9 days ago
Thank you
avodonosov commented on Without the futex, it's futile   h4x0r.org/futex/... · Posted by u/eatonphil
avodonosov · 9 days ago
Thank you very much.

I can not give you thi final feedback at the moment, I only breefly looked through the articles for not.

The first ones are very accessible (given my prior lnowledge of lamport clocks and happens before as in Java memory model), the later ones I am currently not sure are very clear.

But are easier than the docs I used when first approached this topic in the past, like Documentation/memory-barriers.txt and the Doug Lea's texts.

avodonosov · 9 days ago
* for not.

for now

avodonosov commented on Without the futex, it's futile   h4x0r.org/futex/... · Posted by u/eatonphil
bonzini · 17 days ago
Shameless plug: https://lwn.net/Articles/844224/ is in my opinion exactly the parts that are missing from the book that the author criticizes. I focus on how threads synchronize, independent of the actual primitives you use, and then explain how that synchronization is usually realized.
avodonosov · 9 days ago
Thank you very much.

I can not give you thi final feedback at the moment, I only breefly looked through the articles for not.

The first ones are very accessible (given my prior lnowledge of lamport clocks and happens before as in Java memory model), the later ones I am currently not sure are very clear.

But are easier than the docs I used when first approached this topic in the past, like Documentation/memory-barriers.txt and the Doug Lea's texts.

avodonosov commented on Without the futex, it's futile   h4x0r.org/futex/... · Posted by u/eatonphil
avodonosov · 17 days ago
Can anyone suggest a good explanation of memory barriers?
avodonosov commented on Emailing a one-time code is worse than passwords   blog.danielh.cc/blog/pass... · Posted by u/max__dev
Perz1val · a month ago
I don't know if you're sarcastic or just missing the problem; which is that people will be presented with lika a facebook login page, on a site with url like `facebook.quick-login.com` or `facebock.com` and they'll enter the passcode since as fair as they were concerned, they did everything correct. The disclaimer does shit preventing that, they »obviously« didn't share the code with any other website, they entered it on the facebooks as they were told!
avodonosov · a month ago
I am sarcastic because this discussion is about a different attack. Not about fishing.

(The OP says one time codes are worse than passwords. In case of fishing passwords fail the same way as one time codes.)

I was also sarcastic/provocative even in the prev comment, saying the GOOD site always includes a warning with the code making the attack impossible. A variation of the attack is very widely used by phone scammers: "Hello, we are updating intercomm on your appartment block. Please tell us your name and phone number. Ok, you will receive a code now, tell it to us". Yet many online services and banks still send one time codes without a warning to never share it!

The fishing point may also be used in defence of one time codes: if the GOOD service was using passwords instead of one time codes, the BAD could just initiated fishing attack, redirecting the user to a fake login page - people today are used to "Login with" flow.

u/avodonosov

KarmaCake day2000October 26, 2012
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Programmer (Lisp, Java, C++, Javascript, other languages and technologies).

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