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lnsru · 8 months ago
We had many experiments with nanoimprint lithography at the university 20 years ago. The resolution was poor and the durability very poor. After dozens of imprints the “stamps” degraded heavily. I am curious if 20 years were enough to fix all the issues and it’s really competitive today.
hinkley · 8 months ago
I would think you’d want to make them out of something crazy like diamond or titanium carbide. What did you make yours out of?
swordsmith · 8 months ago
Came to the comments to see this. Stamping has all sorts of problems with alignment, stamp resolution, contact quality, etc, it's not clear whether this so called "simplicity" still holds after scaling up the resolution even more.
actionfromafar · 8 months ago
Wasn't this sort of how Intel got started in the 1970s? Some kind of contact printed ICs?
formerly_proven · 8 months ago
You're probably thinking of contact lithography, where a 1:1 mask is placed directly on the wafer and illuminated. This would've been used for the earliest IC processes, where you'd still be able to see the structures with the naked eye or a loupe.
sva_ · 8 months ago
> For instance, compared to an EUV system employing a 250-watt light source, Canon estimates NIL consumes just one-tenth the energy.

I'm not an expert on this but feel like a 250w light is not the major driver of cost in EUV? Or am I misunderstanding this?

dralley · 8 months ago
Producing 250w of EUV light requires 20+ kilowatts of electricity pumped through an extremely expensive system of lasers and mirrors.
Szpadel · 8 months ago
AFAIK the main coat of EUV is cost of machines that will be obsolete in few years, so you want to produce as many chips using them as possible during that timeframe, they design a lot of around to maintain near 100% uptime of those machines. This include buffers before and after machines (so any unplanned stalls are mitigated) and technicians trained to do maintenance in F1 pitstop fashion. (source: some tour of some chipmaker I saw online, no longer remember details)
nabla9 · 8 months ago
> to maintain near 100% uptime

They have uptime only about 80%. They need to be stopped, calibrated and maintained frequently.

They do not go obsolete quicly. They are constantly upgraded. 10-15 year old fabs and machines are still running all over the world. There are 1000 nm, 90nm, 40 nm, 14 nm fabs still running. High-end is not all of semiconductor industry.

yesthis · 8 months ago
That's not because they become obsolete, it's because they're the rate-limiting step (bottleneck).
lnsru · 8 months ago
These machines will be not obsolete for very long time. They are extremely rare and expensive. And the most of semiconductors are fabricated on mature nodes anyway.
javiramos · 8 months ago
When an ASML Lithography Machine Goes Down: https://youtu.be/6v9gx3Z4oVk?
zitterbewegung · 8 months ago
"Obsolete" which I guess for you means for the bleeding edge? Larger nanometer processes will still be in use since their cost will come down. For example when automakers stopped their orders for chips during COVID they pivoted (ported?) to higher nanometer designs because it wasn't a core requirement.
blux · 8 months ago
AFAIK, 250W is the net energy of light arriving at the wafer after it has reflected off of many mirrors, with a very inefficient process to generate light from the tin plasma on top of that.
on_the_train · 8 months ago
Yes that's a strange quote. 250w is not only wrong, but absolutely minuscule compared to the tech around it. I work on the optics system
Panoramix · 8 months ago
Weird article. The energy consumption of an EUV machine is about 1MW, that's why it's interesting to have an efficient alternative, not the actual useful power of the source.
namibj · 8 months ago
That's why they're working on FEL light sources.
DanielHB · 8 months ago
That sounds like a lot, but how many of those machines does an average fab have? Seriously I have no idea.
saddat · 8 months ago
The driving CO2 amplifier should be already beyond that figure alone
szundi · 8 months ago
Yes, it is 250w output but the efficiency is near zero, really
dylan604 · 8 months ago
But you can bake a cake with a mere 60w light. That 250w is also much less than what it takes to run modern GPUs. so it's all relative.
majoe · 8 months ago
The EUV light is produced by shooting a pulsed laser on tin droplets.

You already lose most of the input power in the pulsed laser. Then only a fraction of the energy of the light hitting the tin is converted to EUV light with the correct wavelength. Finally the EUV light has to be focused on the mask through complicated optics, which is notoriously difficult for EUV light.

I guess, there are other sources of inefficiencies, that I forgot.

sgarland · 8 months ago
I’d just like to comment on how batshit insane the technology is.

“We pulse lasers in sync with dispensing droplets of molten tin to produce light that doesn’t exist outside of stars, then we use mirrors with a sub-angstrom surface roughness to precisely direct it onto wafers.”

Not to mention the fact that this is happening, IIRC, thousands of times per second, and the tool has to take the wafer’s topography into account to focus the beam. Honestly, EUV litho makes every other technology you could describe sound like child’s play.

DoctorOetker · 8 months ago
Is there a reason EUV labs don't collocate with synchrotron FEL lasers?
thfuran · 8 months ago
Isn't it actually tin plasma?
abdullahkhalids · 8 months ago
OP states that this can go down to 14nm. What I am interested in is whether older and larger processes (say ~50nm) can be done at a much cheaper cost than traditional methods.

A lot of stuff simply does not require the most advanced chips.

nabla9 · 8 months ago
Canon has been selling nanoprint litography machines for a long time.

FPA-1200NZ2C came out 2015-2016. Press release from a sale 2017 https://global.canon/en/news/2017/20170720.html

shaism · 8 months ago
The answer almost certainly is no. While lithography is one of the largest single contributor to manufacturing costs, the contribution to overall cost is still far below 10%.

And one cannot simply substitute an optical lithography with a nano imprint machine without redesigning some part of the process (etch, metrology etc.).

Investing R&D resources for a (best case) 10% reduction in costs while still having a decent probability of failure in a big but declining node is not worth it.

atq2119 · 8 months ago
Note that 14nm processes (which are quite old by now) are not the same as 14nm feature sizes. I'm not sure what these machines are capable of, since some details may well be lost in translation in this kind of publication. And I'm only an interested enthusiast, I don't work in the field directly.

But towards the end of the article they talk of targeting 8nm line width in 2028, which is impressive. Maybe this time around NIL actually becomes real for high-end processes?

pama · 8 months ago
These numbers are all mindboggling. I understand that the modern specs for EUV dont mean wire width, but if with this future NIL we truly get down to 8nm wide wires, perhaps we should start counting the number of atoms across the width of the wire (around 30).
phonon · 8 months ago
These are feature sizes. (Comparable to the 13.5 nm of EUV)
y04nn · 8 months ago
For everyone interested on technical details of the TSMC EUV process I would highly recommend this CCC talk [1] (From Silicon to Sovereignty: How Advanced Chips are Redefining Global Dominance).

[1] https://news.ycombinator.com/item?id=42546231

sschueller · 8 months ago
I knew the process was complex especially with the light source but I didn't realize that diffraction was something they also use which is absolutely insane.
modeless · 8 months ago
Cool! I uploaded the video to YouTube here: https://www.youtube.com/watch?v=sB-y-tDlOSA

(It's licensed CC-BY so this should be allowed, and I like having videos like this on YouTube where I can easily watch them from anywhere and add them to my playlists.)

mjrpes · 8 months ago
The "transistors shipped" in the history of computing was an interesting number. In 2024 it is now over 10^24. That's a massive number, more than estimate number of stars in the universe. But, in another sense, still quite small. It finally surpassed Avogadro's number, or 6*10^23 particles. This is the equivalent of a small shot glass filled with water (molecules).
notarealllama · 8 months ago
This is fascinating and looks promising! I've never heard of this but expect we will more in the near future, especially if they meet that 2028 target.

I wonder what the environmental impact of this is versus extreme ultraviolet. Although they mention "cost of ownership" and throughput, I wonder if this has any hidden implications.

huijzer · 8 months ago
Why should we care about the environmental impact of EUV machines? I think it's probably better to focus on things which have a real environmental impact. For example, EUV machines are estimated to 54 000 GWh per year by 2030 [1]. This number is a extremely high estimate because current usage is much lower (10 GWh per tool annually according to the same article and in 2020 ASM shipped their 100th EUV system, so current total about 1 000 GWh). This is sold as being "power hungry". Let's put these numbers in perspective.

The United States alone consumes about 25 000 TWh "primary energy" pear year (includes electricy, transport, and heating) [2]. This means that in the extreme case, EUV machines consume 54 TWh / 25 000 TWh = 0.2% of total energy! In comparison, 27% of total U.S. energy consumption was used for transporting people and goods around in the US [3].

And I made the example here before that if you are considering to turn off your phone in order to save battery at the risk of taking an accidental detour, then the decision is simple. Keep the phone. Driving one kilometer extra consumes multiple orders of magnitude more energy than powering a phone for hours. I think this idea holds in many more cases. Video meetings for example can save people from traveling all over the world. This saves energy and time as well.

So I would say please go full power on chip manufacturing. It's way better for the environment (and often saves people time) than deciding to stop innovation and instead keep transporting everything around physically. I'm not saying transport is bad. I'm saying that standing in the way of innovation as an argument for better "environmental impact" is nonsensical.

[1]: https://www.techinsights.com/blog/euv-lithography-power-hung...

[2]: https://ourworldindata.org/energy/country/united-states

[3]: https://www.eia.gov/kids/using-and-saving-energy/transportat...

franga2000 · 8 months ago
> So I would say please go full power on chip manufacturing. It's way better for the environment

The flip side of this is that chips becoming so cheap has caused a huge increase in e-waste. Basically everything has a computer inside it (think smart toothbrushes, fridges, toys...) and it usually leads to shorter product lifetimes. Manufacturers drop support for their apps and shut down cloud services sometimes as quickly as two years after manufacture, so things are thrown away. Smart gadgets are also generally more prone to breaking due to having more, more complex more and sensitive parts (no way that 10c MCU in a smart toaster is survivng 10 years of hot-cold cycles).

If chips were more expensive, we wouldn't waste machine time on dual-core mediatek SOCs for 100 € smartphones with a "life expectantly" of less than two years. Manufacturers would make expensive and quality phones and those that can't afford them (I've been there) would buy older models used or refurbished. Longer product lifespans, more reuse, less waste.

jampekka · 8 months ago
It's nice to think that global warming can be solved with some technological gimmics so people don't have to make any lifestyle changes.
tehjoker · 8 months ago
It's also a question of whether the higher powered process produces many lower power chips. I suspect this is the case.
saagarjha · 8 months ago
Nobody has to lose for lithography to win.
hinkley · 8 months ago
I feel like this tech would be better suited to flexible circuitry, because flexible can be continuous feed, and why try to limit or size your stamp to the surface area of a wafer when you could just size it to the width of a spool? Also flexible circuits tend to be at a much larger feature size and so it’s okay if they’re a couple generations behind, but this is still far ahead of printed circuitry.
spuz · 8 months ago
I wonder how big the wafers can be in the NIL system. It definitely sounds like the larger the wafer, the more problems you will have with deformation, alignment etc. if they have to reduce the wafer size in then that would also affect their ability to compete with EUV.
ov_ov_ov · 8 months ago
Think is on roll-to-roll flexible substrate, no wafers.
westurner · 8 months ago