Methodology doesn't support the conclusion.
Try using images that it wasn't trained on.
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zerohp commented on ChatGPT can accurately estimate Body Fat Percentage from photos annaleptikon.substack.com... · Posted by u/Luc
zerohp commented on Intel's Redwood Cove: Baby Steps Are Still Steps chipsandcheese.com/2024/0... · Posted by u/pella
> Also, I don’t think executing both sides of a branch ever took off on any mainstream CPUs
That part I am sure off. I will double check with a friend of mine of of curiosity, but one thing to note is that the execution units are processing branches up to the point when branch is evaluated, then the false path is dropped.
Back then the speed was trumping the power draw. I am not sure what are the priorities today.
In terms of hyperthread, i don't think you can safely execute instructions of both siblings due to possible shared cache mem clashes. But I am guessing now. Its been a while since I have been working that low level to remember the details.
I don't know of any CPU that speculates both sides of a branch. I work on a CPU design team.
Modern CPUs speculate hundreds of instructions ahead, and with just a dozen branches you can have a few thousand different paths. It makes more sense to speculate down one path with very high accuracy.
zerohp commented on Adding 16 kb page size to Android android-developers.google... · Posted by u/mikece
As an aside, it's shame that hardware page table walking won out over software filled TLBs, as some older computers had. I wonder what clever and wonderful hacks we might have been able to invent had we not needed to give the CPU a raw pointer to a data structure the layout of which is fixed forever.
Software table walk performance is bad on modern out of order processors because it has to finish every older instruction in flight and redirect the front end to the exception vector. This can take several hundred cycles. Hardware table walk can take <20 cycles to hit in the next level cache.
zerohp commented on Do not taunt happy fun branch predictor (2023) mattkeeter.com/blog/2023-... · Posted by u/fanf2
> Why do we need a special function return instruction? Functionally, BR LR would do the same job as RET. Using RET tells the processor that this is a function return.
I'm not sure this is a good design. Those two opcodes perform the same logic function but have different branch prediction hints.
Meanwhile, there are other cases where an existing instruction is reinterpreted with new semantics:
* On x86, `XCHG eax, eax` is `NOP`.
* On x86, `XOR reg, reg` is `MOV reg, 0` and breaks dependencies for the purposes of register renaming.
* On x86, various examples of macro-op fusion and micro-op fusion.
* On various RISC architectures, `ADD r1, r0, 1234` is `MOV r1, 1234`.
* On some RISC architectures, conditionally branching if r0 == 0 is the only way to express an unconditional branch.
I see no reason why `BR LR` can't be the standard function return instruction and involve the branch predictor.
In AArch64, `BR LR` and `RET` do not perform the same logic when FEAT_BTI (Branch Target Identification) is present.
As an amateur EE it is so annoying that they reuse names of already existing ARM chips.
ARM Cortex-M4 or simply M4 is quite popular ARM architecture. I am using M0, M3 and M4 chips from ST on a daily basis.
As a professional EE, I know that ARM Cortex-M4 is not a chip. It's an embedded processor that is put into an SOC (which is a chip), such as the STM32-family from ST.
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zerohp commented on Apple to wind down electric car effort after decadelong odyssey bloomberg.com/news/articl... · Posted by u/coloneltcb
More cooks does not a delicious meal make.
More cooks can't make one meal better but more cooks can make dozens of different meals and you can choose the best result.
zerohp commented on Meta's big vision for face computers might be better than Apple's theverge.com/2024/2/14/24... · Posted by u/mfiguiere
> We all know that Meta is capable of neither designing nor manufacturing Apple Vision Pro
According to what? What limitation is there that stops Meta engineers from being able to do this?
John Carmack had some things to say about it:
https://www.forbes.com/sites/paultassi/2022/12/17/john-carma...
EDIT: direct link https://www.facebook.com/permalink.php?story_fbid=pfbid0iPix...
Silicon Valley builds empires off the back of free intellectual labor. I'm done with all of it. If they want something from me they can (and do) pay for it.