fayalalebrun (u/fayalalebrun)

fayalalebrun commented on A FPGA friendly 32 bit RISC-V CPU implementation github.com/SpinalHDL/VexR... · Posted by u/_benj

bri3d · a year ago

The most interesting thing about this isn’t that it’s a RISC-V implementation but that it’s written in a Scala HDL language, SpinalHDL. There are quite a few of these now - Chisel (which Spinal forked from long ago), Amaranth (Python), and Clash (Haskell) all come to mind.

fayalalebrun · a year ago

SpinalHDL did not fork from Chisel. You might be able to say that it was inspired by Chisel, but it does not share a commit history. See this comment by the author: https://www.reddit.com/r/chisel/comments/4ivevd/comment/d3lj...

fayalalebrun commented on “Bad Apple” in Minecraft purplesyringa.moe/blog/we... · Posted by u/purplesyringa

fayalalebrun · a year ago

My favorite dithering algorithm for motion video is Yliluoma dithering: https://bisqwit.iki.fi/story/howto/dither/jy/

It is especially useful for grayscale content, as finding the optimal dithering matrix from the available palette is a straightforward exact operation, and the result can be placed in a LUT for real-time rendering.

In my opinion it looks much better than bayer or random dithering, especially on gradients.

fayalalebrun commented on Ask HN: What business would you start in 2025? · Posted by u/jamesq

mikewarot · a year ago

Making systolic array chips (my BitGrid design) to bring provably secure Petaflops to the masses. They're handy for any algorithm that can tolerate extreme pipelining, including deep nets.

Because everything is trivial to reason about, there's nowhere for bugs, or zero day exploits, to hide.

Oh.. and we'd do an open source data diode product as well.

fayalalebrun · a year ago

Do you have any other examples where systolic arrays are suitable other than matrix multiplication? As far as I am aware, other problems require different systolic architectures. So I am curious whether you are talking about a general purpose architecture.

fayalalebrun commented on Google Chrome has an API accesible only from *.google.com twitter.com/lcasdev/statu... · Posted by u/develatio

hot_gril · a year ago

At least other video conferencing tools don't lag like Meet, so users don't need to debug ;) I think this has to do with all of them using H.264 while Meet uses VP8/9.

fayalalebrun · a year ago

As a result of a flaw in the protocol itself or in its implementation?

fayalalebrun commented on Why the CORDIC algorithm lives rent-free in my head github.com/francisrstokes... · Posted by u/todsacerdoti

TuringTourist · 2 years ago

This was the cause of the signature jiggly textures that were pervasive in PS1 games

fayalalebrun · 2 years ago

This is a common misconception, but is not the case. For example, look at the Voodoo 1, 2, and 3, which also used fixed point numbers internally but did not suffer from this problem.

The real issue is that the PS1 has no subpixel precision. In other words, it will round a triangle coordinates to the nearest integers.

Likely the reason why they did this is because then you can completely avoid any division and multiplication hardware, with integer start and end coordinates line rasterization can be done completely with addition and comparisons.

fayalalebrun commented on A rudimentary simulation of the three-body problem github.com/achristmascarl... · Posted by u/achristmascarl

adamredwoods · 2 years ago

Also check out: https://universesandbox.com/

https://twitter.com/UniverseSandbox/status/17709221751443007...

fayalalebrun · 2 years ago

A few years ago a friend and I made something similar to universe sandbox, though only with the gravitational simulation part: https://github.com/fayalalebrun/Astraria

Surprisingly enough the jar still runs without issue. Something which probably would not be the case for linux binaries, but maybe for windows.

fayalalebrun commented on Red Hat to author new Linux driver for Nvidia GPUs in Rust phoronix.com/news/Red-Hat... · Posted by u/dralley

Mathnerd314 · 2 years ago

My understanding was that the proprietary drivers work fine.

fayalalebrun · 2 years ago

Even though the newest nvidia drivers have started to support GBM, the Wayland compatibility story is still not great. In my experience on Wayland, several OpenGL programs refuse to work, and Vulkan does not work at all. This is with driver 545.

fayalalebrun commented on Veryl: A Modern Hardware Description Language github.com/veryl-lang/ver... · Posted by u/hasheddan

dalance · 2 years ago

Hi, Im' developer of Veryl. So I'll try to write the answer to "why new HDL?".

I use SystemVerilog from 10+ years ago, and developed many large ASICs. But development environment of SystemVerilog was poor than software development. So I wrote some SystemVerilog tools to improve the environment like below: https://github.com/dalance/svlint

After writing it, I felt that more improvement is difficult because the specification of SystemVerilog is too complicated. (For example, even commercial EDA tool vendors can't cover all specification...)

Therefore I decided to develop a new language replacing SystemVerilog. I focus that the new language can be used by production ASIC development. I'm plan to develop a part of a new project in my company by using Veryl.

fayalalebrun · 2 years ago

I probably don't have nearly as much experience as you do, but I have used VHDL, Verilog, and modern HDLs like Chisel and SpinalHDL. I think the main advantage of a modern HDL is to have the full power of a traditional programming language when it comes to generating hardware. This especially helps when making deeply parameterizable and reusable hardware in a fraction of the lines compared to SystemVerilog, and which sometimes is impossible to do in Verilog.

From a first impression, your language doesn't look all that different from SystemVerilog. Does it have any features that make parameterization easier than SystemVerilog? Can I, for example, easily generate hardware using higher order functions and other functional programming features like those available in Rust and Scala?

fayalalebrun commented on Veryl: A Modern Hardware Description Language github.com/veryl-lang/ver... · Posted by u/hasheddan

fpgamlirfanboy · 2 years ago

i'll hop on the dismissive bandwagon but not for the same reason as everyone else: not a single one of these HDLs ever (ever) amount to more than perl scripts.

why? how? how could that possibly be? this one is written in rust...?

because not a single one of them, ever (ever) emits a netlist. they all emit verilog (or vhdl). hence: overengineered perl scripts (which actual employed RTL engineers use heavily...).

fayalalebrun · 2 years ago

Chisel does emit FIRRTL. Which can be made into a bitstream directly by Yosys.