Readit NewsNo, it's not. DRAM latency on Apple Silicon is significantly higher than on the desktop, mainly because they use LPDDR which has higher latencies.
Source: chipsandcheese.com memory latency graphs
However, this doesn't really hold up as the cause for the difference. The Zen4/5 chips, for example, source the vast majority of their instructions out of their uOp trace cache, where the instructions have already been decoded. This also saves power - even on ARM, decoders take power.
People have been trying to figure out the "secret sauce" since the M chips have been introduced. In my opinion, it's a combination of:
1) The apple engineers did a superb job creating a well balanced architecture
2) Being close to their memory subsystem with lots of bandwidth and deep buffers so they can use it is great. For example, my old M2 Pro macbook has more than twice the memory bandwidth than the current best desktop CPU, the zen5 9950x. That's absurd, but here we are...
3) AMD and Intel heavily bias on the costly side of the watts vs performance curve. Even the compact zen cores are optimized more for area than wattage. I'm curious what a true low power zen core (akin to the apple e cores) would do.
It's easy to dismiss a basic article like this, but it's basically a discovery that every Junior engineer will make, and it's useful to talk about those too!
At a first glace through, it seems to be written at a good blend between concept and implementation followthrough, something that notoriously is not always there for CG papers :) And it's also refreshing to read something that is not neuro-AI-generation of this or that for a change!
It's Risk vs Reward. Anyone who built something great took huge risks, for a huge return.
There is no return here. At best, you've sunk a ton of capital into a low-profit business that is propped up only by government subsidy.
If you instead went on to produce millions of pizzas for people and 30,000lb of flour, that 300lb you used to learn looks like a pretty reasonable investment.