Readit News logoReadit News
hydroreadsstuff commented on Valve reveals it’s the architect behind a push to bring Windows games to Arm   theverge.com/report/82065... · Posted by u/evolve2k
btdmaster · 25 days ago
> When you get into lower power, anything lower than Steam Deck, I think you’ll find that there’s an Arm chip that maybe is competitive with x86 offerings in that segment.

At which point does this pay off the emulation overhead? Fex has a lot of work to do to bridge two ISAs while going through the black box of compiler output of assembly, right?

hydroreadsstuff · 25 days ago
afaia emulators like Fex are within 30 to 70% of native performance. On the fringes worse or better. But overall emulation seems totally fine. Plus emulator technology in general could be used for binary optimization rather than strict mappings, opening up space for more optimization.
hydroreadsstuff commented on FEX-emu – Run x86 applications on ARM64 Linux devices   fex-emu.com/... · Posted by u/open-paren
hydroreadsstuff · a month ago
Some companies like to stress the efficiency or performance of Arm SoCs, but really this is a hedge against more expensive x86 hardware. AMD has increased prices of mobile SoCs radically recently. I'm looking forward to having more affordable SoC options for laptops, handhelds and desktops, perhaps from Mediatek or other lower-cost vendors.

The history of the PC is one of commoditization. A fractured multi-polar landscape is detrimental to the ecosystem/productivity and should ultimately fail.

x86 emulation is an important puzzle piece, and I'm happy Valve recognizes this and sponsors it.

hydroreadsstuff commented on Seoul says US must fix its visa system if it wants Korea's investments   english.hani.co.kr/arti/e... · Posted by u/garbawarb
andris9 · 4 months ago
I once flew to the US for a week on ESTA to attend a few meetings (pre-COVID), but I mostly just did my regular developer work in the US office. By today’s standards, would I have been shackled for that?
hydroreadsstuff · 4 months ago
That's what it seems like. Some people here disagree with you, but I can add anecdata that my employer insisted I do no coding on such a VISA.
hydroreadsstuff commented on AMD claims Arm ISA doesn't offer efficiency advantage over x86   techpowerup.com/340779/am... · Posted by u/ksec
Avi-D-coder · 4 months ago
From what I have heard it's not the RISCy ISA per se, it's largely arm's weaker memory model.

I'd be happy to be corrected, but the empirical core counts seem to agree.

hydroreadsstuff · 4 months ago
Indeed, the memory model has a decent impact. Unfortunately it's difficult to isolate in measurement. Only Apple has support for weak memory order and TSO in the same hardware.

Deleted Comment

hydroreadsstuff commented on The Llama 4 herd   ai.meta.com/blog/llama-4-... · Posted by u/georgehill
hydroreadsstuff · 9 months ago
This means GPUs are dead for local enthusiast AI. And SoCs with big RAM are in.

Because 17B active parameters should reach enough performance on 256bit LPDDR5x.

hydroreadsstuff commented on Undergraduate shows that searches within hash tables can be much faster   quantamagazine.org/underg... · Posted by u/Jhsto
joaohaas · a year ago
Thanks for the video, def a lot better than the article.

I do find it a bit weird that this is somehow better than just over-allocating (and thus reducing the chances of key collisions, which also makes worst case 'less worse') given his approach also allocates more memory through the aux arrays.

hydroreadsstuff · a year ago
Overallcoation has a limit. You only have so much RAM/storage. Beyond that you start swapping. I could really use a hash table (or similar structure) that degrades less with higher occupancy.
hydroreadsstuff commented on Measuring Apple CPU Core-to-Core Latency Without Core-Pinning   github.com/hydroo/macos-c... · Posted by u/hydroreadsstuff
IronWolve · a year ago
Interesting, would be nice to expand this to other cpus, and more features of a view into the cores. I know my current amd has 2 ccds, and 1 ccd is a tad slower according to amd ryzen master learning. But theres no fancy graphs.
hydroreadsstuff · a year ago
For other platforms there is already https://github.com/nviennot/core-to-core-latency

This project works around a limitation in MacOS, namely lack of thread pinning, and makes it possible to do it without Asahi Linux, and without using custom MacOS kernel extensions and disabling security features.

u/hydroreadsstuff

KarmaCake day231October 9, 2018View Original